Continuing from A Start to Video Output for My 65816...
I am working on the core circuit for my VGA card. I am targeting 320x240x1byte. Below is the current state of the schematic. For initial testing, I will store image data on the flash ROM. If I can get an image to display from the ROM, I will then begin to swap out the ROM with dual-port RAM (to which my 65816 will write). I will start building a test circuit soon.
What mistakes am I making? Suggested changes? Thanks!
Note: CLK connection on U21 is missing.
PDF Version:
PLD Version
PLD Config
Just a thought, you may want to run HSYNC and VSYNC to an inverter with the output on header pins, in case you decide later to support other resolutions with different sync pulse polarity. Though, if I did that, I'd use 8-bit comparators to test the counter outputs instead of NAND gates, and maybe make the comparison value settable via dip switches? That might be pushing it, but that's the direction I was headed when I threw my hands in the air and decided FPGA was for me on video. My VGA requirements were too high for discreet logic, and I kept giving headaches and opening a beer...