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Zynq-7000 PCB, Round Two (PCIe?)

Writer: rehsdrehsd

Over the past year, I took a shot at designing a Zynq-7000-based development board. I am now considering an update to my first board -- applying lessons learned, adding some functionality, and getting more practice at these types of designs.



Reflection

My first board was based on the Zynq-7020. This was pretty much my first attempt at this level of design and assembly work. Ultimately, I feel that I was successful in this attempt -- I had better results than I had anticipated. I attribute this success to helpful training content from FEDEVEL, solid documentation from Xilinx, nice supporting content from Phil's Lab on YouTube, and community guidance (e.g., viewer comments on my YouTube videos).


Note: I'm still actively working with my first version of the board, primarily focused on graphics capabilities at this stage (e.g., PL-based features).


As I reflect on changes I would like to make to my first board, I am considering the following changes to an updated board:


  • Fix minor issues from first board that required bodge wires

  • Power off sequencing

  • 2.0mm programming header (instead of, or in addition to current 2.54mm header)

  • Power headers

  • Add 5V to expansion connectors

  • Remove option to power from USB

  • Add ADV7513 HDMI transmitter

  • Add DS3231 real-time clock (previous add-on)

  • Add WM8960 audio codec (previous add-on)

  • Refine component selection (e.g., capacitors with improved ESR values)

  • Improved quality of schematic

  • Component selection in schematic to use actual part numbers from LCSC to improve bill of materials preparation

  • Headers for I2C and SPI

  • Additional onboard LEDs for PS and PL use

  • Expose all unused I/O pins

  • Include secondary HDMI and/or VGA (?)

  • Add PCIe to support an external GPU


Zynq Device Selection

Many of the items in the list are fairly small updates. However, PCIe support is a significant upgrade for my board. Looking at the Zynq-7000 data sheet, I see a few options for PCIe support.

I am using an XC7Z020-3CLG484E on my first design which has no support for PCIe. I will need to choose whether I use an XC7Z015 or step up to an XC7Z030 or better. As of this writing, the following are available from LCSC. All prices are listed in USD.


  • XC7Z015-3CLG485E - $27.47

  • *XC7Z030-2FFG676I - $64.30

  • XC7Z035-2FFG900I - $112.20

  • XC7Z045-2FFG900I - $160.40

  • XC7Z100-2FFG1156I - $252.44


On one hand, I would like to step up to a more capable SoC from my current XC7Z020. On the other hand, these more capable SoCs quickly increase in cost. I also have concerns about the higher pin counts (although, the pitch increases from 0.8mm to 1.0mm). For now, I will rule out the 045 and 100 due to cost. I'll have to decide between the 15, 30, and 35. The 15 is closest to my current design and likely will result is lower risk for me; however, the 035 seems to be much more capable, including PCIe Gen2 x8 support (versus x4). As of right now, I am leaning towards the XC7Z030-2FFG676I. It's more capable than my current SoC, adds PCIe Gen2 x4 support, and is a smaller package than the 035 (676 pins vs 900 pins). While the 030 is double the price of my 020, the 035 doubles the price again. Of course, I'd like to use -3 parts, but their price typically jumps up a bit (and I don't see as much availability of parts right now).


Edit: The 035, 045, and 100 appear to require Vivado ML Enterprise ($), so these are ruled out. Realistically, my options are down to the 015 and 030.


I also looked into the Zynq Ultrascale+ EG with onboard GPU support, but...wow...ouch($)...no.


At this point, I'm going to start the research and design process with the XC7Z030-2FFG676I as the target device. Thoughts/suggestions?




More to come!

I will continue to update this post as I go.



Misc Notes

  • ZC7015 device supports only up to Gen1 speed for -1 speed grades. For other speed grades, the maximum link speed supported is Gen2 and link width is x4. *

  • ZC7030 device supports max link width up to x4 and link speed Gen2. *


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